Signal Generators (Audio through RF)
Featured Products (10)
The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.
The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator.
When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.
In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2× interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.
An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in a 165-ball, 8 mm × 8 mm, 0.5 mm pitch CSP_BGA package, and a 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.
- High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz.
- Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed.
- Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin.
- Broadband communications systems
- DOCSIS 3.1 CMTS/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM)
- Wireless communications infrastructure
- W-CDMA, LTE, LTE-A, point to point
The AD9172 is a high performance, dual, 16-bit digital-to-analog converter (DAC) that supports DAC sample rates to 12.6 GSPS. The device features an 8-lane, 15 Gbps JESD204B data input port, a high performance, on-chip DAC clock multiplier, and digital signal processing capabilities targeted at single-band and multiband direct to radio frequency (RF) wireless applications.
The AD9172 features three complex data input channels per RF DAC that are bypassable. Each data input channel includes a configurable gain stage, an interpolation filter, and a channel numerically controlled oscillator (NCO) for flexible, multiband frequency planning. The device supports up to a 1.5 GSPS complex data rate per input channel and is capable of aggregating multiple complex input data streams up to a maximum complex data rate of 1.5 GSPS. Additionally, the AD9172 supports ultrawide bandwidth modes bypassing the channelizers to provide maximum data rates of up to 3.08 GSPS (with 16-bit resolution) and 4.1 GSPS (with 12-bit resolution).
The AD9172 is available in a 144-ball BGA_ED package.
- Supports single-band and multiband wireless applications with three bypassable complex data input channels per RF DAC at a maximum complex input data rate of 1.5 GSPS. One independent NCO per input channel.
- Ultrawide bandwidth channel bypass modes supporting up to 3 GSPS data rates with 16-bit resolution and 4 GSPS with 12-bit resolution.
- Low power dual converter decreases the amount of power consumption needed in high bandwidth and multichannel applications.
- Wireless communications infrastructure
- Multiband base station radios
- Microwave/E-band backhaul systems
- Instrumentation, automatic test equipment (ATE)
- Radars and jammers
The ADL5375 is a broadband quadrature modulator designed for operation from 400 MHz to 6 GHz. Its excellent phase accuracy and amplitude balance enable high performance intermediate frequency or direct radio frequency modulation for communication systems.
The ADL5375 features a broad baseband bandwidth, along with an output gain flatness that varies no more than 1 dB from 450 MHz to 3.8 GHz. These features, coupled with a broadband output return loss of <−14 dB, make the ADL5375 ideally suited for broadband zero IF or low IF-to-RF applications, broadband digital predistortion transmitters, and multiband radio designs.
The ADL5375 accepts two differential baseband inputs and a single-ended LO. It generates a single-ended 50 Ω output. The two versions offer input baseband bias levels of 500 mV (ADL5375-05) and 1500 mV (ADL5375-15).
The ADL5375 is fabricated using an advanced silicon-germanium bipolar process. It is available in a 24-lead, exposed paddle, Pb-free, LFCSP_VQ package. Performance is specified over a −40°C to +85°C temperature range. A Pb-free evaluation board is also available.
- Cellular communication systems
GSM/EDGE, CDMA2000, W-CDMA, TD-SCDMA
- WiMAX/broadband wireless access systems
- Satellite modems
Security and Surveillance
- Scanning Equipment
The AD9144 is a quad, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.8 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF6720 analog quadrature modulator (AQM) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a typical range of 13.9 mA to 27.0 mA. The AD9144 is available in an 88-lead LFCSP.
- Greater than 1 GHz, ultrawide complex signal bandwidth enables emerging wideband and multiband wireless applications.
- Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies.
- JESD204B Subclass 1 support simplifies multichip synchronization in software and hardware design.
- Fewer pins for data interface width with a serializer/deserializer (SERDES) JESD204B eight-lane interface.
- Programmable transmit enable function allows easy design balance between power consumption and wake-up time.
- Small package size with 12 mm × 12 mm footprint.
- Wireless communications
- 3G/4G W-CDMA base stations
- Wideband repeaters
- Software defined radios
- Wideband communications
- Local multipoint distribution service (LMDS) and multichannel multipoint distribution service (MMDS)
- Transmit diversity, multiple input/multiple output (MIMO)
- Automated test equipment
The ADF5356 allows implementation of fractional-N or integer N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference frequency. The wideband microwave VCO design permits frequency operation from 6.8 GHz to 13.6 GHz at one radio frequency (RF) output. A series of frequency dividers at another frequency output permits operation from 53.125 MHz to 6800 MHz.
The ADF5356 has an integrated VCO with a fundamental output frequency ranging from 3400 MHz to 6800 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate RF output frequencies as low as 53.125 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin- and software-controllable.
Control of all on-chip registers is through a simple 3-wire interface. The ADF5356 operates with analog and digital power supplies ranging from 3.15 V to 3.45 V, with charge pump and VCO supplies from 4.75 V to 5.25 V. The ADF5356 also contains hardware and software power-down modes.
- Wireless infrastructure (LTE, W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS)
- Point to point and point to multipoint microwave links
- Satellites and very small aperture terminals (VSATs)
- Test equipment and instrumentation
- Clock generation
HMC8192 is a passive wideband I/Q MMIC mixer that can be used either as an image reject mixer for receiver operations or as a single sideband upconverter for transmitter operations. With an RF and LO range of 20 GHz to 42 GHz, and an IF bandwidth of DC to 5 GHz, the HMC8192 is ideal for applications requiring wide frequency range, excellent RF performance, and a simpler design with fewer parts and a smaller printed circuit board (PCB) footprint. A single HMC8192 can replace multiple narrowband mixers in a design.
The inherent I/Q architecture of the HMC8192 offers excellent image rejection and thereby eliminates the need for expensive filtering for unwanted sidebands. The mixer also provides excellent LO to RF and LO to IF isolation and reduces the effect of LO leakage to ensure signal integrity.
Being a passive mixer, the HMC8192 does not require any DC power sources. It offers a lower noise figure compared to an active mixer, ensuring superior dynamic range for high performance and precision applications.
The HMC8192 is fabricated on a GaAs MESFET process and uses Analog Devices, Inc., mixer cells and a 90-degree hybrid. It is available in a compact 4 mm × 4 mm, 25-lead LGA package and operates over a −40°C to +85°C temperature range. An evaluation board for this device is also available.
- Test and Measurement Instrumentation
- Military, Radar and Aerospace
The HMC8191 is a passive, wideband, I/Q monolithic microwave integrated circuit (MMIC) mixer that can be used either as an image reject mixer for receiver operations or as a single-sideband upconverter for transmitter operations. With a radio frequency (RF) and local oscillator (LO) range of 6 GHz to 26.5 GHz, and an intermediate frequency (IF) bandwidth of dc to 5 GHz, the HMC8191 is ideal for applications requiring a wide frequency range, excellent RF performance, and a simple design with fewer components and a small printed circuit board (PCB) footprint. A single HMC8191 can replace multiple narrow-band mixers in a design.
The inherent I/Q architecture of the HMC8191 offers excellent image rejection and thereby eliminates the need for expensive filtering for unwanted sidebands. The mixer also provides excellent LO to RF and LO to IF isolation and reduces the effect of LO leakage to ensure signal integrity.
Being a passive mixer, the HMC8191 does not require any dc power sources. It offers a lower noise figure compared to an active mixer, ensuring superior dynamic range for high performance and precision applications.
The HMC8191 is fabricated on a gallium arsenide (GaAs) metal semiconductor field effect transistor (MESFET) process and uses Analog Devices, Inc. mixer cells and a 90-degree hybrid. The HMC8191 is available in a compact, 4 mm × 4 mm, 24-terminal leadless chip carrier (LCC) package and operates over a −40°C to +85°C temperature range. An evaluation board for the HMC8191 is also available from the Analog Devices website.
- Test and measurement instrumentation
- Military, aerospace, and defense applications
- Microwave point to point base stations
The HMC8193 is a passive, in phase/quadrature (I/Q), monolithic microwave integrated circuit (MMIC) mixer that can be used either as an image rejection mixer for receiver operations, or as a single-sideband upconverter for transmitter operations from 2.5 GHz to 8.5 GHz. The inherent I/Q architecture of the HMC8193 offers excellent image rejection and thereby eliminates the need for expensive filtering of unwanted sidebands. The mixer also provides excellent local oscillator (LO) to radio frequency (RF) and LO to intermediate frequency (IF) isolation and reduces the effect of LO leakage to ensure signal integrity.
Being the HMC8913 is a passive mixer, it does not require any dc power sources. The device offers a lower noise figure than an active mixer, ensuring superior dynamic range for high performance and precision applications.
The HMC8193 is fabricated on a gallium arsenide (GaAs), metal semiconductor field effect transistor (MESFET) process and uses Analog Devices, Inc., mixer cells and a 90° hybrid. It is available in a compact, 4 mm × 4 mm, 24-lead LCC package and operates over the −40°C to +85°C temperature range. An evaluation board for this device is also available.
- Test and measurement instrumentation
- Military, aerospace, and radar
- Direct conversion receivers
The HMC1118 is a general-purpose, broadband, nonreflective single-pole, double-throw (SPDT) switch in a LFCSP surface mount package. Covering the 9 kHz to 13.0 GHz range, the switch offers high isolation and low insertion loss. The switch features >48 dB isolation, 0.68 dB insertion loss up to 8.0 GHz, and a 7.5 μs settling time of 0.05 dB margin of final RFOUT. The switch operates using positive control voltage logic lines of +3.3 V and 0 V and requires +3.3 V and −2.5 V supplies. The HMC1118 can cover the same operating frequency range with a single positive supply voltage applied and the negative supply voltage (VSS) tied to ground and still maintaining good power handling performance. The HMC1118 is packaged in a 3 mm × 3 mm, surface mount LFCSP package.
- Test instrumentation
- Microwave radios and very small aperture terminals (VSATs)
- Military radios, radars, and electronic counter measures (ECMs)
- Fiber optics and broadband telecommunications
The ADRF5024 is a reflective, single-pole double-throw (SPDT) switch manufactured in the silicon process.
This switch operates from 100 MHz to 44 GHz with better than 1.7 dB of insertion loss and 35 dB of isolation. The ADRF5024 has an radio frequency (RF) input power handling capability of 27 dBm for both the through path and hot switching.
The ADRF5024 draws a low current of 14 µA on the positive supply of +3.3 V and 120 µA on negative supply of −3.3 V. The device employs complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)compatible controls.
The ADRF5024 is pin-compatible with the ADRF5025, low frequency cutoff version, which operates from 9 kHz to 44 GHz.
The ADRF5024 RF ports are designed to match a characteristic impedance of 50 ?. For ultrawideband products, impedance matching on the RF transmission lines can further optimize high frequency insertion loss and return loss characteristics. Refer to the Electrical Specifications section, Typical Performance Characteristics section, and Applications Information section for more details.
The ADRF5024 comes in a 2.25 mm × 2.25 mm, 12-terminal, RoHS-compliant, land grid array (LGA) package and can operate between −40°C to +105°C.
- Industrial scanners
- Test and instrumentation
- Cellular infrastructure: 5G mmWave
- Military radios, radars, electronic counter measures (ECMs)
- Microwave radios and very small aperture terminals (VSATs)
Interactive Signal Chains
To operate the evaluation board, the user must attach the board to a compatible FMC carrier board, such as those provided by FPGA vendors. Analog Devices produces an FPGA carrier called the ADS7-V2, which serves as a digital pattern generator or data source as well as the power supply for the boards. The AD917x board has an option to be powered from a lab power supply when used in a special NCO-only mode. This operation is described in more detail in the User's Guide, linked on the wiki site. The user must be able to observe the DAC output on a spectrum analyzer. A low noise clock source is provided on the evaluations boards, the HMC7044 clock synthesizer, and an option exists for the user to supply a low jitter external sine or square wave clock as a clock source instead. The evaluation board comes with software, called ACE, which allows the user to program the SPI port. Via the SPI port, the DUT (and clock circuitry) can be programmed into any of its various operating modes. It also comes with the DAC Software Suite which includes the DPGDownloader for vector generation, download, and transmission to the evaluation board when using the ADS7-V2.
Products UsedView All
- AN-1404: Simplifying Fully Differential Amplifier System Design with the DiffAmpCalc? (Rev. 0) PDF
- AN-1396: How to Predict the Frequency and Magnitude of the Primary Phase Truncation Spur in the Output Spectrum of a Direct Digital Synthesizer (DDS) (Rev. 0) PDF
- AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) PDF
- AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) PDF
- AN-928: Understanding High Speed DAC Testing and Evaluation (Rev. B) PDF